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Sunday, November 18, 2018

Ferrite Core Manufacturing Process


Ferrite is a ceramic compound which contains mixture of iron oxides and one or some times more than one metal with ferrimagnetic properties.

More details on ferrite you can find in my previous blog;
"Ferrite, Ferrite structure and Ferrite properties".

Ferrite Core

A ferrite core is a kind of magnetic core, which is made up of ferrite. On ferrite cores the windings of switching transformers and other types of wound components like inductors are made. It is used because of its properties of high magnetic permeability, which is coupled with low electrical conductivity. This will helps to prevent eddy currents.

There are two extensive uses of ferrite cores according to size and frequency of operation;
  1. Signal transformers - These are of small size and supports high frequencies.
  2. Power transformers - These are of large size and supports lower frequencies.
Below picture shows different types and shapes of ferrite cores;

Ferrite Cores
Different Types and Shapes of Ferrite Cores

Ferrite Core Manufacturing Process

Below steps will clear in detail the ferrite core manufacturing process;
  • Normal ceramic methods are used for manufacturing of Ferrite, i.e. here processing deals with the composition of iron oxide mixed with oxides of manganese + zinc or nickel + zinc.
  • Different process involves; predefined molar ratio based raw material mix, calcination process to achieve constant physical properties, then milling process, pressing to the desired shape, sintering and final finishing.
  • Chemistry and development conditions affect the final properties of ferrite as, both conditions controls the microstructure formation, which deals with magnetic and mechanical properties of ferrite.
  • In simple words we can say that ferrite making process is same like most ceramic process technologies. We can divide Ferrite Core Manufacturing Process into four main tasks;
  1. Powder preparation
  2. Pressing 
  3. Sintering Process
  4. Ferrite finishing
Let explain these tasks in detail;

1. Powder preparation 

  • The first step in the manufacturing of powder starts with the chemical study of the raw materials i.e. study of the oxides or carbonates of the main ingredients. 
  • The pureness of these constituents adds a plus point directly to the quality of the finishing product and required to be controlled to guarantee a batch-to-batch steadiness.
  • The precise amount of the main constituents is weighed and carefully mixed into a homogeneous mixture.
  • This mixing can be done in a dry method, or water can be added to make slurry and then mixed in a ball mill.
  • When wet mixing is used, a drying method is necessary to decrease the moisture content before to calcining process.
  • Calcining is a pre-firing method in which the powder temperature is increased to about 1000°C in an air atmosphere.
  • During the calcining there is a little decomposition of the carbonates and oxides, evaporation of volatile impurities and a homogenation of the powder mixture.
  • There is a degree of spine1 conversion throughout calcining and this pre-firing step also decreases the shrinkage in the final sintering.
  • After calcining the powder is mixed with water and the slurry is milled to get small and constant particle sizes.
  • At this phase of the process, binders and lubricants are added. The nature of lubricant and binder is decided by the forming technology.
  • The last stage in the powder preparation is to spray dry the slurry in a spray dryer.

2. Forming or Pressing

  • It is the second stage in the ferrite processing technology and deals with the forming of the ferrite.
  • The mostly used method is “dry pressing” to convert powder into the core shape.
  • Other methods are “extruding” and “isostatic pressing”.
  • Dry pressing or compacting is done using a joint act of top and bottom punches in a cavity such that a part of uniform density is made.
  • As compacting is only along the vertical axis, the only size modification can be done at the press height.
  • Isostatic pressing generally uses flexible bowls, such as thick rubber molds, which have very simple shapes likes blocks, rods, discs, etc.
  • In Isostatic press the bowl is filled with non-bindered powder, sealed, and positioned inside a pressure chamber or vessel.
  • Then the pressure is increased to a particular level, usually 10K psi to 30K psi, and then decreased.
  • The bowl is then detached from the vessel, unsealed and the pressed form is taken out, which will further forward for sintering.
  • Organic binder is not used in this method because of the incompatibility between the rate at which the binder is burned out during sintering and the shrinkage that is arising at the same time.
  • This incompatibility results in the product breaking. Isostatic pressing produces material with fixed density, which is suitable for machining into difficult geometrical sizes.
  • This method is appreciated for prototype designing, in which no dry press moulds are available.
  • This method can also create geometrical size that cannot be formed using regular pressing methods such as big core volume or non-pressable difficult shapes.
  • Extruding method is normally used to form long, small cross section ferrite parts such as rods and tubes.
  • The spray dried powder is mixed with a nourishing plasticizer that permits the powder to be forced through the suitable extruding die.
  • In all of the above forming techniques the sizes of the forming tool or mould must be bigger than the final product sizes by a pre-calculated factor that permits for shrinkage while sintering.
Below picture shows ferrite pressing machine (dry powder pressing type);

Ferrite Press Machine

3. Sintering Process

  • This is the most critical stage in the manufacturing of ferrite cores.
  • In this process the product attains its final magnetic and mechanical features.
  • Sintering of manganese-zinc ferrites needs symmetry between time, temperature and atmosphere along each stage of the sintering cycle.
  • Sintering starts with a slow ramping up from room temperature to nearly 800°C where impurities, residual moisture, binders, and lubricants are burned out of the ferrite product.
  • In this part of the sintering cycle the atmosphere is air. The temperature is more increased to achieve the final sinter temperature of 1000°C - 1500°C, depending on the material type.
  • When the temperature is increasing, a non-oxidizing gas like nitrogen is introduced into the kiln to decrease the oxygen content of the kiln atmosphere.
  • A decrease of oxygen pressure is very critical during the cool-down cycle in obtaining high quality MnZn ferrite cores.
  • At lower temperatures of 1000°C-1200°C, the sintering of nickel-zinc ferrites occurs.
  • The nickel-zinc material can be sintered in an air atmosphere. During sintering the ferrite parts shrinks to required final dimensions.
  • Different material and processing methods results in change of the shrinkage of geometry size, but usual shrinkage ranges from 10% to 20% of the moulded sizes.
  • The final ferrite part size includes mechanical tolerances of +2% of the nominal part size.
Figure at below shows a usual manganese-zinc sintering cycle in a tunnel kiln.

MnZn Ferrite
Sintering Profile of a MnZn material
Below figure clearly shows the influence on temperature and oxygen with the increase in time in tunnel kiln.

MnZn Ferrite
Temperature and oxygen with respect to time
Below picture shows Ferrite Cores before and after Sintering;

Ferrite Cores
Ferrite Cores before and after Sintering

4. Finishing

  • This is after sintering process. Most of the ferrite parts require some way of finishing process to meet customer requirements.
  • Although the basic magnetic characteristics are been set during sintering and cannot be change. Proper finishing methods can enhance the magnetic performance of ferrite cores. Below are some common processes;
  • There are two known methods for specifying a gap in ferrite core. First one is by specifying an AL value and the second is to specify a mechanical gap length.
  • In simple words, less gap then less AL value.
  • To enhance dielectric resistance, to reduce edge chips, and to provide a smooth winding surface; coating of toroid is done. 
  • Nylon, epoxy paint and parylene are the types of coatings. 
  • The nylon and epoxy paint normally needs a minimum coating thickness of .005” to confirm uniform safety. Because of this, these coatings are used mainly on toroid’s that have outer diameters of .500” or more. 
  • Coating colour can be used for material identification instead of using any type of marking. 
  • Per .003” of coating the breakdown voltages is 500V to 1000V. 
  • Parylene used on toroid with outer diameter less than .500” because of the high cost of the raw material. Parylene is a colour less coating. 
  • Higher voltage breakdown of approximately 1000 volts per .001” is achievable with parylene. A thickness of .0005” also provides uniform protection. 
  • Lapping is an extra production method used to decrease the results of an air gap on mated cores, typically done on mated cores with material permeability’s over 5000 to achieve the maximum AL value for a given material. 
  • This method includes polishing the mating surface of the core after grinding by using slurry media. 
  • By this a “mirror-like” finish will be formed on ferrite core. 
  • It is necessary for accurate control of flatness and appearance of the mating surface. 
  • Grinding (machining) is done to obtain the specified dimensions by grinding the cores with a diamond wheel. 
  • In this process water is used as coolant to avoid cracks. 
  • Grinding wheel types : Silicon Carbide Grinding wheels, Diamond-impregnated metal-bonded grinding wheel, Diamond-impregnated resin-bonded grinding wheel, Resin and metal (resmet) bonded diamond-impregnated grinding wheel, Galvanic bonded diamond grinding wheel, Cubic boron nitride (cbn) grinding wheel. 
Below Picture shows Ferrite Grinding Machine;

Ferrite Grinding Machine
Below are the additional finishing operations which can be performed on ferrite cores;
  • To obtain tight mechanical tolerances surface grinding should be perform. 
  • Identification marking. 
  • Cementing wires for identification purpose. 
  • Gapping to Control AL value.
  • Cutting rods and tubes of beads on wire.
  • Shape grinding of threaded cores.
  • Packaging for automated assembly requirements.
  • In pot cores and RM cores to install tuner nuts.
Now as per above mentioned four main tasks, we can draw a flowchart which shows the Ferrite Core Manufacturing Process in detail;


Let understand each flowchart steps in detail;
1) Raw Materials  In required pureness and physical properties raw material is selected.

2) Weighing  To get the required chemical properties, weighing to be done in proportion to the mole ratio.

3) Mixing  To achieve the uniformity mixing should be properly done, which will result in effective chemical reaction.

4) Calcination – Calcination is done to get the required ferrite formation by adjusting the furnace condition.

5) Crushing – Crushing is done to suit further milling. It is done by crushing the calcined material.

6) Additives – This process is for altering magnetic properties.

7) Milling – This process is done to get fine particle to control shrinkage and microstructure.

8) Binder/Lubricant Addition - To get sufficient mechanical strength to the green body a binder or a lubricant is added. Binder should to be add in proper amount in the material.

9) Granulation – This process is for achieving free flowing of powder. By this the powder can easily flow in to die or mould part.

10) Pressing – Pressing is done to get the required size and shape as per specification. The size is adjusted again and again at the time of green core pressing in accordance to the shrinkage of powder.

11) Sintering – As per desired specifications sintering is done to attain the required magnetic, electrical and mechanical properties of the ferrite core.

12) Grinding and Polishing – Surface grinding is done to control the dimensions of ferrite core to match the close tolerance. Polishing is done to takeout unwanted materials from ferrite core surface and to give a shining surface.

13) Marking and Packaging – These are final processes. Marking is done for identification of ferrite types, manufacturing details and other important details. After this ferrites are packed properly and are ready for dispatch.


Ferrites are most important part of an electronic circuit. Manufacturers produce ferrite cores with different types of materials and in a variety of shapes or geometrical sizes according to the applications. Ferrite Core Manufacturing Process includes many methods to achieve uniform magnetic and mechanical characteristics. With the enhancement of manufacturing technology and cost reduction factor forcing manufacturers to adopt various methods to ease the ferrite manufacturing process, but the main components of manufacturing will remain same as mentioned in this article.

Wednesday, November 7, 2018

Power Factor Correction (PFC) – Critical Conduction Mode Boost Converter Calculations using L6562

For designing Critical Conduction Mode Boost Converter Calculations using L6562 here consider an example of 50W PFC circuit which we have to design.

      1) First detail input specifications have to be defined.

·        Mains voltage range (Vac rms): 
VACmin = 85Vac   and   VACmax = 265Vac

·        Minimum mains frequency:
fl = 47Hz

·        Rated output power (W):
Pout = 50W

·        Regulated DC output voltage (Vdc):
Vout = 400 V
Here the output has been set at 400 Vdc as the typical value because we know that in boost topology based PFC the regulated output voltage depends strongly on the maximum AC input voltage and for correct operation of boost the output voltage must always be higher than the input i.e.         
                                                                         VACmax ⋅ √2= 374 Vpk
(Consider output voltage must be 6 to 7% higher than the maximum input voltage peak).

·        Expected efficiency (%):
η = Pout / Pin = 93%
We had selected the efficiency and PF at minimum input voltage and maximum load.

·        Expected power factor:
PF = 0.99

·        Maximum output overvoltage (Vdc):
ΔOVP = 55V
Excessive output voltage at startup or in case of load transients is generated because of the narrow loop voltage bandwidth. This overvoltage at PFC output can overstress the output components and the load. The L6562 integrates an overvoltage protection (OVP) to solve this problem. OVP sets the extra voltage over imposed at Vout.

·        Maximum output low-frequency ripple:
ΔVout = 20 V
We know that the ripple amplitude determines the current flowing into the output capacitor and the ESR. The mains frequency generates a 2fL voltage ripple on the output voltage at full load.

·        Minimum output voltage after line drop (Vdc):
Vout min = 300 V

·        Holdup capability (ms):
tHold = 10 ms
It is a holdup capability in case of mains dips.

·        Minimum switching frequency (kHz):
fsw min = 35 kHz
This will decide our boost inductor. Here we consider the switching frequency at low mains on the top of the sinusoid and at full load conditions. For wide range operation the minimum frequency range should be in between 20 to 50 kHz. Be aware frequency should not be very high otherwise high losses will occur at high input voltage.

·        Maximum ambient temperature (°C):
Tambx = 50 °C
It is the local temperature at which the PFC components are working.

      2) Operating Condition of the PFC circuit.

·        Rated DC output current:
Iout = (Pout/Vout) = 50W / 400V = 0.125A

·        Maximum input power:
Pin = (Pout/η) = (50W/93) x 100 = 53.76W

·        RMS input current:
        Iin = (Pin/VACmin  ·  PF) = 54W / (85Vac  ·  0.99) = 0.641A

We considered;
Pin = 54W

·        Peak inductor current:
ILpk = 2  ·  √2  ·  Iin = 2  ·  √2  ·  0.641 = 1.812A

We know that the inductor current is a triangle shape at switching frequency, and the peak of triangle is twice its average value (please refer Figure 1). The average value of the inductor current is exactly the peak of the input sine wave current, and therefore RMS inductor current can be calculated by using RMS input current.

Critical Conduction Mode PFC operation
Critical Conduction Mode PFC operation

RMS inductor current:
ILrms = (2/√3) · Iin = (2 / √3) · 0.641 = 0.740A

·        AC inductor current:
ILac = √(ILrms² - Iin²) = √[(0.740)²-(0.641)²] = 0.369A

In Inductor during the on time, the current increases from zero up to the peak value and circulate into the switch, while during the off time the current decreases from peak down to zero and circulate into the diode. So, a triangular wave current, having peak value equal to the inductor current flows through switch and diode. Now we can calculate the RMS current flowing in to both of these components in order to calculate the losses of these two components.

·        RMS switch current:
ISWrms = ILpk · √[(1/6) – (4√2/9π) · (VACmin/Vout)]
                               = 1.812 · √[(1/6) – (4√2/9π) · (85Vac/400V)]= 0.638A

·        RMS diode current:
IDrms = ILpk · √[(4√2/9π) · (VACmin/Vout)]
                                    = 1.812 · √[(4√2/9π) · (85Vac/400)] = 0.373A

      3) Power section design of the PFC circuit.

·        Bridge Rectifier
Following points has to be considered while selecting it;
o   Normally a 600V device is selected in order to have good margin against mains surges.
o   Use a NTC as a current limiter to avoid overstress to the Rectifier Bridge and fuse.
o   To calculate rectifier bridge power dissipation;

Iinrms = √2 · Iin/2 = √2 · 0.641A/2 = 0.453A

Iin_avg = √2 · Iin/π = √2 · 0.641A/3.141 = 0.288A

Pbridge = 4 · Rdiode · Iinrms + 4 · Vth · in_avg
                = 4 · 0.07Ω · (0.453A)² + 4 · (1V) · 0.288A = 1.209W

From the bridge rectifier datasheet we had selected;
Threshold Voltage = Vth = 1V
Dynamic resistance = Rdiode = 0.07Ω

·        Input Capacitor
The need of input high-frequency filter capacitor (Cin) is to attenuate the switching noise which arises because of high-frequency inductor current ripple.

Cin = Iin/(2π · fswmin · r · VACmin) = 0.641A/(2π · 35kHz · 0.2 · 85Vac)
                                                          = 0.171µF
                                                          = 0.15µF (nearby value selected)
Where; r = 0.2

This value is selected because the maximum high-frequency voltage ripple across Cin is generally arises between 5% and 20% of the minimum rated input voltage. Use DC film capacitor for this application.

·        Output Capacitor
The output bulk capacitor (Co) selection depends on;
o   Regulated DC output voltage
o   Rated Output Power
o   Maximum output overvoltage

Co ≥ Pout/(2π · fi · Vout · ΔVout)
Co ≥ 50/(2π · 47Hz· 400V · 20V) = 21.1µF

The total RMS capacitor ripple current, including mains frequency and switching frequency components;
ICrms = √(IDrms² - Iout²) = √(0.373² - 0.125²) = 0.351

If Holdup time of capacitor is needed for the PFC stage then the capacitance value changes to;

CO = (2 · Pout · tHold)/[(Vout - ΔVout)² - (Vout min)²]
      = (2 · 50 · 10ms)/[(400V - 20V)² - (300V)²]
      = 18.3µF
Holdup time means, CO has to deliver the output power for a certain time (tHold) with a specified minimum output voltage (Vout min).

It’s good to add 20% tolerance to the electrolytic capacitors for the right dimensioning. So by adding 20% to 18.3uF we will get 21uF. So, by considering greater nearby value a capacitor value of 22uF/450V has been selected.
i.e.  Co = 22µF/450V
By this new capacitor value the calculated Holdup capability is;

tHold = {CO[(Vout – ΔVout)² - Vout min²]}/2 · Pout
            = {22µ[(400 – 20)² - 300²]}/2 · 50 = 12ms

By this new capacitor value the calculated output voltage ripple variation is;

ΔVout = Iout/(2π · fi · CO) =  0.125A/(2π · 47Hz · 22µ) = 19.24V

·        Boost Inductor
Working frequency of converter is determined by boost inductor. To ensure a correct Transition Mode operation keep minimum switching frequency greater than the maximum frequency of the L6562A internal starter (which is 190µs).

ON time and the OFF time of the power MOSFET is given by;

ton (VAC, θ) = L · ILpk · sin(θ)/[√2 · VAC · sin(θ)]
                      = L · ILpk/√2 · VAC

toff (VAC, θ) = L · ILpk · sin(θ)/[Vout - √2 · VAC · sin(θ)]

ILpk is the maximum peak inductor current in a line cycle.
θ is the instantaneous line phase in the interval [0,π]

Also, ON time is constant over a line cycle.

We know that, Peak inductor current:
ILpk = 2  ·  √2  ·  Iin = 2  ·  √2  ·  0.641 = 1.812A

ton (VAC, θ) = L · 2  ·  √2  ·  Iin /√2 · VAC
toff (VAC, θ) = L · 2  ·  √2  ·  Iin · sin(θ)/[Vout - √2 · VAC · sin(θ)]

We can find the instantaneous switching frequency along a line cycle by;

fSW (VAC, θ) = 1 / (Ton + Toff)
             = VAC² · [Vout - √2 · VAC · sin(θ)] / 2 · L · Pin  · Vout

We know that the switching frequency is the minimum at the top of the sinusoid (θ = π/2 rad => sin θ =1), maximum at the zero-crossings of the line voltage (θ = 0 rad or π rad=> sin θ =0), where Toff =0μs.

The minimum frequency fswmin can occur at either the maximum mains VACmax or the minimum mains voltage VACmin, thus the inductor value can be given by;

L(VAC) = [VAC² · (Vout - √2 · VAC)] / [2 · fswmin· Pin · Vout]

Now we can calculate the inductor values for;

L(VACmin) =
[(85Vac)² · (400V - √2 · 85Vac)] / [2 · 35kHz · 50W · 400V]
= 1.44mH

L(VACmax) =
[(265Vac)² · (400V - √2 · 265Vac)] / [2 · 35kHz · 50W · 400V]
= 1.26mH

For this application a 1.26mH boost inductance has been selected. The minimum value has to be taken into account.

Now we can re-calculate the minimum switching frequency by;
fswmin (VACmin) = [(VACmin)² · (Vout - √2 · VAC)] / [2 · L · Pin · Vout]
By putting the value of L = 1.26mH
fswmin (VACmin) = [85AC² · (400V- √2 · 85AC)] / [2 · (1.26m)· 50W · 400]
= 40kHz

fswmin (VACmax) = [(VACmax)² · (Vout - √2 · VAC)] / [2 · L · Pin · Vout]
By putting the value of L = 1.26mH
fswmin (VACmax) = [265AC² · (400V- √2 · 265AC)] / [2 · (1.26m)· 50W · 400]
= 35kHz

So, after re-calculating the minimum switching frequency we got 35 kHz as expected.

·        Power MOSFET selection
RDS(ON) is the major criteria to select MOSFET. It depends on the output power (In our case it is 50W), Output voltage (In our case it is 400V), maximum output overvoltage (In our case it is 55V) and a tolerance of 20%.
1.2 · Vout = MOSFET voltage rating
1.2 · 400 = 480V
MOSFET voltage rating = 500V    (Considering nearby value).

Already we had calculated the RMS Switch Current;
RMS switch current = 0.638A
3X 0.638A = 1.914A = 2A  (by rounding up)
This is the maximum current rating of the MOSFET.

For our 50W PFC application we had selected IRF840MOSFET.

Let proceed further with the calculation of MOSFET’s power dissipation which depends on conduction, switching and capacitive losses.

Conduction Loss:
The conduction losses at maximum load and minimum input voltage are calculated by:
Pcond(VACmin) = RDSon · [ISWrms(VACmin)]²
                      = 2  · [0.638 (85V)]²
                      = 5881.7

Pcond(VACmax) = RDSon · [ISWrms(VACmax)]²
                      = 2  · [0.638 (265V)]²
                      = 57169.3

We had selected RDSon = 2 because in datasheet normally it is given in reference to ambient temperature 25◦C. To calculate correctly the conduction losses at 100 °C (typical MOSFET junction operating temperature) a factor of 2 should be taken into account.

Switching Loss:
The switching losses in the MOSFET occur only at turnoff because of Transition Mode operation and can be basically expressed by;
Pswitch(VACmin) = VMOS · IMOS· tfall · fsw (VACmin)
                    = 550 · 8 · 6n sec · 35 KHz (85)
                    = 78.54

Pswitch(VACmax) = VMOS · IMOS· tfall · fsw (VACmax)
                    = 550 · 8 · 6n sec · 35 KHz (265)
                    = 244.86

Above equations represents the crossing between the MOSFET current that decreases linearly during the fall time and the voltage on the MOSFET drain that increases.

Switching losses also depends on the total drain capacitance as during the fall time the current of the boost inductor flows into the parasitic capacitance of the MOSFET charging it. As switching frequency depends on the input line voltage and the phase angle on the sinusoidal waveform; by considering the above equation the switching losses per 1µs of current fall time and 1nF of total drain capacitance can be written as:

At turn-on the losses are due to the discharge of the total drain capacitance inside the MOSFET itself.

Capacitive Loss:
The capacitive losses are given by:

Pcap(VAC) = 0.5 · Cd · V²MOS · fsw(VAC)

Cd = the total drain capacitance including the MOSFET and the other parasitic capacitances such as the inductor at the drain node.
MOS = the drain voltage at MOSFET turn ON.

Taking into account the frequency variation with the input line voltage and the phase angle, a detailed description of the capacitive losses per 1nF of total drain capacitance can be calculated as:

ϑ1 and ϑ2 depend on input voltage and they are defined as follows:
ϑ1 = arcsin (Vout / 2√2VAC)
ϑ2 = π – ϑ1

The total loss function of the input mains voltage is the sum of Conduction, Switching and Capacitive losses;

Ploss(VAC) = RDSon · P’cond (VAC) + (t²fall/Cd) · P’sw(VAC) +  Cd · P’cap (VAC)

From the maximum ambient temperature (Tambx = 50 °C), the total maximum thermal resistance required to keep the junction temperature below 125 °C is:

Rth = [(125 °C – Tambx) / Ploss (VAC)]
      =   _____

If the result of above equation is lower than the junction-ambient thermal resistance given in the MOSFET datasheet for the selected device package, a heat sink must be used.

Important observations;
ü The MOSFET turn-on occurs just on the valley because the inductor has depleted its energy and therefore it can resonate with the drain capacitance.
ü It is clear that for an input voltage theoretically lower than half of the output voltage the resonance ideally should reach zero achieving zero-voltage operation, therefore there are no losses relevant to this edge.
ü For input voltage corresponding to a positive value of the valley, capacitive losses are not generated.
ü However, the MOSFET turn-on always occurs at the minimum voltage of the resonance and therefore the losses are minimized.
ü Capacitive losses are dominant at high mains voltage and the major contribution came from the conduction losses at low and medium mains voltage.

·        Boost Diode selection
For selecting output rectifier;
Select a minimum breakdown voltage of = 1.2 · (Vout + ΔVovp)
             = 1.2 · (400V + 55V) = 546V
          Where, Maximum output overvoltage (Vdc): ΔOVP = 55V
Select a current rating higher then = 3 · Iout
             = 3 · (0.125A) = 0.375A

Further calculation related to thermal will give right selection.
If the diode junction temperature operates within 125 °C the device has been selected correctly, otherwise a bigger device must be selected.

In this 50 W application an STTH1L06 (600 V, 1 A) has been selected.

For this diode;
Rectifier threshold voltage = Vth = 0.89V
Dynamic resistance = Rd = 0.165Ω
Also, already we had calculated;
AVG = Rated DC output current = Iout = 0.125A
RMS = RMS diode current = IDrms = 0.373A

Pdiode = Vth · Iout + Rd · ID²rms
           = 0.89 · 0.125 + 0.165 · (0.373)²
           = 0.11125 + 0.02295 = 0.1342W

Maximum ambient temperature = Tambx = 50°C
Rth = (125°C – Tambx) / Pdiode
       = (125°C- 50°C) / 0.1342W
       = 558.86

There’s no need of any heat sink for the rectifier as; the calculated Rth is higher than the STTH1L06 thermal resistance junction to ambient .i.e.
Rth(j-a) = 70 for DO-41 package with lead length 10mm.

Now, to evaluate the conduction losses use the following equation:

P = [0.89 · IF(AV) ]+ [0.165 · IF²(RMS)]
   = [0.89 ·1] + [0.165 · 10²]
   = 17.39

IF(AV)= Average forward current (δ = 0.5) = 1A for DO-41 package.
IF(RMS)= Forward RMS voltage = 10A for DO-41 package.

Source : Referred STMicroelectronics "Solution for designing a transition mode PFC preregulator with the L6562A". Link is at below;

Author & Editor

Hi, welcome to my blog, “Power Electronics Talks”.

I am Alok Pandey, an Electronics Engineer. I am passionate about Power Electronics and latest Technology. By profession I am design and application engineer and play with circuits.

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