Below steps explains the Design of Boost Converter Using UC3854 in Continuous Conduction Mode;
- This design is for 400Vdc output
- These calculations covers design for Continuous Conduction Mode boost power factor corrector.
The output voltage of a boost regulator must be greater than the peak of the maximum input voltage and a value 5% to 10% higher than the maximum input voltage is recommended so the output voltage is chosen to be 400Vdc.
Therefore; at 277Vac max = Vpeak = 391.6Vac
Switching Frequency:
The choice of switching frequency is generally somewhat arbitrary. The switching frequency must be high enough to make the power circuits small and minimize the distortion and must be low enough to keep the efficiency high. In most applications a switching frequency in the range of 20KHz to 300KHz proves to be an acceptable compromise. The example converter uses a switching frequency of I00KHz as a compromise between size and efficiency. The value of the inductor will be reasonably small and cusp distortion will be minimized, the inductor will be physically small and the loss due to the output diode will not be excessive. Converters operating at higher power levels may find that a lower switching frequency is desirable to minimize the power losses. Turn-on snubbers for the switch will reduce the switching losses and can be very effective in allowing a converter to operate at high switching frequency with very high efficiency.
Inductor Selection:
The inductor determines the amount of high frequency ripple current in the input and its value is chosen to give some specific value of ripple current. Inductor value selection begins with the peak current of the input sinusoid. The maximum peak current occurs at the peak of the minimum line voltage and is given by:
I line (pk) = (√2 x P) / (Vin (min))
For the example converter the maximum peak line current is 4.42 amps at a Vin of 80Vac.
The maximum ripple current in a boost converter occurs when the duty factor is 50% which is also when the boost ratio M=Vo/Vin=2. The peak value of inductor current generally does not occur at this point since the peak value is determined by the peak value of the programmed sinusoid. The peak value of inductor ripple current is important for calculating
the required attenuation of the input filter.
The peak-to-peak ripple current in the inductor is normally chosen to be about 20% of the maximum peak line current. This is a somewhat arbitrary decision since this is usually not the maximum value of the high frequency ripple current. A larger value of ripple current will put the converter into the discontinuous conduction mode for a larger portion of the rectified line current cycle and means that the input filter must be larger to attenuate more high frequency ripple current. The UC3854, with average current mode control, allows the boost stage to move between continuous and discontinuous modes of operation without a performance change.
The value of the inductor is selected from the peak current at the top of the half sine wave at low input voltage, the duty factor D at that input voltage and the switching frequency. The two equations necessary are given below:
D = (VO-Vin) / VO
L = (Vin x D) / (fs x ∆I)
Where, ∆l is the peak-to-peak ripple current.
The high frequency ripple current is added to the line current peak so the peak inductor current is the sum of peak line current and half of the peak to peak high frequency ripple current. The inductor must be designed to handle this current level.
For our example the peak inductor current is 5.0 amps. The peak current limit
will be set about 10% higherat 5.5 amps.
Output Capacitor:
The factors involved in the selection of the output capacitor are the switching frequency ripple current, the second harmonic ripple current, the DC output voltage, the output ripple voltage and the hold-up time. The total current through the output capacitor is the RMS value of the switching frequency ripple current and the second harmonic of the line current. The large electrolytic capacitors which are normally chosen for the output capacitor have an equivalent series resistance which changes with frequency and is generally high at low frequencies. The amount of current which the capacitor can handle is generally determined by the temperature rise. It is usually not necessary to calculate an exact value for the temperature rise. It is usually adequate to calculate the temperature rise due to the high frequency ripple current and the low frequency ripple current and add them together. The capacitor data sheet will provide the necessary ESR and temperature rise information.
The hold-up time of the output often dominates any other consideration in output capacitor selection. Hold-up is the length of time that the output voltage remains within a specified range after input power has been turned off. Hold-up times of 15 to 50 milliseconds are typical. In off-line power supplies with a 400Vdc output the hold-up requirement generally works out to between 1 and 2pF per watt of output. In our 540W example the output capacitor is
820µF. If hold-up is not required the capacitor will be much smaller, perhaps 0.2pF per watt, and then ripple current and ripple voltage are the major concern.
Hold-up time is a function of the amount of energy stored in the output capacitor, the load power, output voltage and the minimum voltage the load will operate at. This can be expressed in an equation to define the capacitance value in terms of the holdup time.
CO = (2 x Pout x ∆t) / (VO² - VO(min)²)
Where, Co is the output capacitor
Pout is the load power
∆t is the hold-up time
Vo is the output voltage
Vo(min) is the minimum voltage the load will operate at.
Switch and Diode:
The switch and diode must have ratings which are sufficient to insure reliable operation. The choice of these components is beyond the scope of this Application Note. The switch must have a current rating at least equal to the maximum peak current in the inductor and a voltage rating at least equal to the output voltage. The same is true for the output diode. The output diode must also be very fast to reduce the switch turn-on power dissipation and to keep its own losses low. The switch and diode must have some level of derating and this will vary depending on the application.
For the example circuit the diode is a high speed,
high voltage type with 35ns reverse recovery, 600Vdc breakdown, and 8A forward
current ratings. The power MOSFET in the example circuit has a 500Vdc breakdown
and 23Adc current rating. A major portion of the losses in the switch are due
to the turn-off current in the diode. The peak power dissipation in the switch
is high since it must carry full load current plus the diode reverse recovery current
at full output voltage from the time it turns on until the diode turns off. The
diode in the example circuit was chosen for its fast turn off and the switch
was oversized to handle the high peak power dissipation. A turn on snubber for
the switch would have allowed a smaller switch and a slightly slower diode.
Below is the step-by-step summary of the design procedure for an active power factor corrector;
1) Specifications: Determine the operating requirements for the active power factor.
Example:
Pout (max) = 540W
Vin range = 80 to 270Vac
Line frequency range = 47 to 65Hz
VO (Output Voltage) = 400Vdc
2) Select Switching Frequency = 100 kHz (as an example)
3) Inductor Selector
A] Maximum Peak Line Current
Pin = Pout (max)
Ipk = (√2 x Pin) / Vin (min)
= (1.414 x 540)/80
= 9.5A
B] Ripple Current
∆I = 0.2 x Ipk
Therefore; 0.2 x 9.5 = 1.9A (pk – pk)
C] Determine the duty factor at Ipk where Vin (peak) is the peak of the rectified line voltage at low line.
Vin (peak) = 80 x 1.414 = 113
Therefore; D = (Vo-Vin (peak)) / Vo
D = (400 – 113) / 400 = 0.71
D] Calculate the inductance, were fs is the switching frequency.
L = (Vin x D) / (fs x ∆I)
We considered switching frequency as 100 kHz.
L = (113 x 0.710) / (100000 x 1.9)
= 80.23/190000
= 4.222 x 10⁻⁴
= 0.42 x 10 ⁻ᶾ
= 0.5 mH (by rounding up)
4) Select Output Capacitor
With hold-up time, use the equation below. Typical values for Co are1µF to 2µF per watt. If hold-up is not required use the second harmonic ripple voltage and total capacitor power dissipation to determine minimum size of the capacitor. ∆t is the hold-up time in seconds and V1 is the minimum output capacitor voltage.
Co = (2 x Pout x ∆t)/(Vo² – V1²)
Therefore;
Co = (2 x 540 x 34 msec) / (400 – 350)
= (2 x 540 x 0.034) / 50
= 0.7344
Co = 820 µF (near value)
5) Select Current Sensing Resistor
If current trans-formers are used then include the turn’s ratio and decide whether the output will be positive or negative relative to circuit common. Keep the peak voltage across the resistor low. 1.0V is a typical value for Vrs.
A] Find tIpk (max) = Ipk + (∆I/2)
Therefore;
Ipk (max) = 9.5 + (1.9/2)
= 10.45A peak
B] Calculate sense resistor value.
Rs = Vrs / (Ipk (max))
Typical value for Vrs = 1.0V
= 1/10.45 = 0.0956
Rs = 0.10 Ω
C] Calculate actual peak sense voltage
Vrs (pk) = Ipk (max) x Rs
= 10.45 x 0.10
= 1.045V
6) Set independent peak current limit
Rpk1 and Rpk2 are the resistors in the voltage divider. Choose a peak current overload value, Ipk(ovld). A typical value for Rpk1 is 10K.
Vrs (ovld) = Ipk (ovld) x Rs
= 10.45 x 0.10
= 1.045V
Rpk2 = (Vrs (ovld) x Rpk1) / Vref Were, Vref = 7.5V
= (1.045 x 100000)/7.5
= 1393.33
= 1.5K
7) Multiplier Setup
The operation of the multiplier is given by the following equation.
Imo = (Km x lac x (Vvea-1)) / Vff²
Were, Imo is the multiplier output current,
Km=1 ,
lac is the multiplier input current,
Vff is the feedforward voltage,
Vvea is the output of the voltage error amplifier.
A] Feed Forward Voltage Divider
Change Vin from RMS voltage to average voltage of the rectified input voltage. At Vin(min) the voltage at Vff should be 1.414 volts and the voltage at Vffc, the other divider node, should be about 7.5 volts. The average value of Vin is given by the following equation where Vin(min) is the RMS value of the AC input voltage:
Vin (avg) = Vin ( min ) x 0.9
= 90 x 0.9
= 72V
The following two equations are used to find the values for the Vff divider string. A value of 1 Megohm is usually chosen for the divider input impedance. The two equations must be solved together to get the resistor values.
Vff = 1.414V = [Vin (av) x Rff3] / [Rff1 + Rff2 + Rff3]
Vnode = 7.5V = [Vin (av) x (Rff2 + Rff3)] / [Rff1 + Rff2 + Rff3]
Therefore;
Rff1=910K, Rff2=91K, and Rff3=20K
B] Rvac selection
Find the maximum peak line voltage.
Vpk(max) = √2 x Vin(max)
= 1.414 x 270
= 382 Vpk
Divide by 600 microamps, the maximum multiplier input current.
Rvac = Vpk(max)/600E-6
= 382 / 6E-4
= 637K (Choose nearby value; 620K)
C] Rb1 selection
This is the bias resistor. Treat this as a voltage divider with Vref and Rvac and then solve for Rb1. The equation becomes:
Rb1 = 0.25 RVac
= 0.25 x 620K
= 155K (Choose nearby value; 150K)
D] Rset selection
Imo cannot be greater than twice the current through Rset. Find the multiplier input current, lac, with Vin (min). Then calculate the value for Rset based on the value of lac just calculated.
Iac (min) = (Vin (pk) / RVAC
= 113 / 620K
= 1.822 x 10¯⁴
= 182 x 10¯⁶
= 182µA
Rset = 3.75 / (2 x Iac (min))
= 3.75 / (2 x 182 x 10¯⁶)
= 10.3KΩ
= 10KΩ (by rounding up)
E] Rmo selection
The voltage across Rmo must be equal to the voltage across Rs at the peak current limit at low line input voltage.
Rmo = (Vrs (pk) x 1.12) / (2 x Iac (min))
= (1.045 x 1.12) / (2 x 182 x 10¯⁶)
= 1.1704 / 0.000364
= 3215.384
= 3.21K
= 3.2K
8) Oscillator frequency
Calculate Ct to give the desired switching frequency.
Ct = 1.25 / (Rset x fs)
= 1.25 / (10K x 100K)
= 1.25nF
9) Current error amplifier compensation
A] Amplifier gain at the switching frequency
Calculate the voltage across the sense resistor due to the inductor current down slope and then divide by the switching frequency. With current transformers substitute (Rs/N) for Rs.
ΔVrs = (Vo x Rs) / (L x fs)
= (400 x 0.10) / (0.0005 x 100000)
= 40 / 50
= 0.8 Vpk
This voltage must equal the peak to peak amplitude of Vs, the voltage on the timing capacitor (5.2 volts). The gain of the error amplifier is therefore given by:
Gca = Vs / ΔVrs
= 5.2 / 0.8 (Vs is the voltage on the timing capacitor = 5.2)
= 6.5
B] Feedback Resistors
Set Rci equal to Rmo.
Rci = Rmo
Rcz = Gca x Rci
= 6.5 x 3.2K
= 20800
= 20KΩ
C] Current loop crossover frequency
fci = (Vout x Rs x Rcz) / (Vs x 2πL x Rci)
= (400 x 0.10 x 20000) / (5.2 x (2πx0.0005) x 3200)
= 800000 / 52.27
= 15305.146
= 15.3 KHz
D] Ccz selection
Choose a 45 degree phase margin. Set the zero at the loop crossover frequency.
Ccz = 1 / (2π x fci x Rcz)
= 1 / (2π x 15.3K x 20K)
= 1 / (2π x 15300 x 20000)
= 1 / 1922654703.99
= 520pF
= 560pF (Choosing nearby value)
E] Ccp selection
The pole must be above fs/2.
Ccp = 1 / (2π x fs x Rcz)
= 1 / (2π x 100K x 20K)
= 1 / (2π x 100000 x 20000)
= 1 / 12566370614.3591
= 79pF
= 82pF (Choosing nearby value)
10) Harmonic distortion budget
Decide on a maximum THD level. Allocate THD sources as necessary. The predominant AC line harmonic is third. Output voltage ripple contributes ½% third harmonic to the input current for each 1% ripple at the second harmonic on the output of the error amplifier. The feedforward voltage, Vff, contributes 1% third harmonic to the input current for each 1% second harmonic at the Vff input to the UC3854.
3% third harmonic AC input current is chosen as the specification. 1.5% is allocated to the Vff input and 0.75% is allocated to the output ripple voltage or 1.5% to Vvao. The remaining 0.75% is allocated to miscellaneous non-linearity.
11) Voltage error amplifier compensation
A] Output ripple voltage
The output ripple is given by the following equation where fr is the second harmonic ripple frequency:
Vo (pk) = Pin / (2πfr x Co x Vo)
= 540 / ((2π x 120)(820 x 10¯⁶)(400))
= 540 / ((2π x 120)(0.00082)(400))
= 2.18Vac
B] Amplifier output ripple voltage and gain
Vo (pk) must be reduced to the ripple voltage allowed at the output of the voltage error amplifier. This sets the gain of the voltage error amplifier at the second harmonic frequency. The equation is:
Gva = (ΔVvao x %Ripple) / Vo (pk)
= (4 x 0.015) / 2.18 (For UC3854 Vvao is 5 – 1 = 4V)
= 0.0275
C] Feedback network values
Find the component values to set the gain of the voltage error amplifier. The value of Rvi is reasonably arbitrary.
Choose Rvi = 511K
Cvf = 1 / (2π x fr x Rvi x Gva)
= 1 / (2π x 120 x 511000 x 0.0275)
= 1 / 10595335.38
= 0.09µF
= 0.047µF (Choosing nearby value)
D] Set DC output voltage
Rvd = (Rvi x Vref) / (Vo - Vref)
= (511K x 7.5) / (400 – 7.5)
= 9.76K
= 10K (Choosing nearby value)
E] Find Pole Frequency
fvi = unity gain frequency of voltage loop
fvi² = Pin / (ΔVvao x Vo x Rvi x Co x Cvf x (2π) ²)
= √ (250 / (4 x 400 x 511K x (820 x 10¯⁶) x 0.047µ x 39.5))
= √ (250 / (4 x 400 x 511000 x 0.00082 x 0.000000047 x 39.5))
= √ (250 / 1.244)
= √200.96
= 14.17 Hz
F] Find Rvf
Rvf = 1 / (2π x fvi x Cvf)
= 1 / (2π x 14.17 x 0.000000047)
= 1 / 0.0000041824172
= 239K
= 240K (Choosing nearby value)
12) Feedforward voltage divider capacitors
These capacitors determine the contribution of Vff to the third harmonic distortion on the AC input current. Determine the amount of attenuation needed. The second harmonic content of the rectified line voltage is 66.2%. %THD is the allowed percentage of harmonic distortion budgeted to this input from step 10 above.
Gff = %THD / 66.2%
= 1.5 / 66.2
= 0.0227
Use two equal cascaded poles. Find the pole frequencies.
fr is the second harmonic ripple frequency.
fp = √Gff x fr
= 0.15 x 120
= 18Hz
Select Cff1 and Cff2
Cff1 = 1 / (2π x fp x Rff2)
Cff2 = 1 / (2π x fp x Rff3)
Therefore;
Cff1 = 1 / (2π x 18 x 91K)
= 0.097µF
= 0.10µF (Choosing nearby value)
Cff2 = 1 / (2π x 18 x 20K)
= 0.44µF
= 0.47uF (Choosing nearby value)
Figure 1 shows Boost Converter circuit using UC3854;
 |
| Boost Converter using UC3854 |
Reference : Reffered Texas Instruments's UC3854 application note. Link is at below;
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